Tutorial: Reverse Engineering a Passive UHF tag, a circuits perspective.

This tutorial will cover the circuits of passively-powered RFID tags, with a focus on the analog front-end and circuits. Passively-powered RFID tags are limited by the energy of the carrier wave, and this talk discusses a custom ASIC approach that gives maximum power efficiency and flexibility.  This tutorial will give the overview of the circuit requirements for a theoretical tag that was reversed engineered from the Gen2 specification.

Topics

RFID Tag Circuits Overview

  • Gen2 Overview
    • Physical Description
    • Protocol Overview
    • Electrical Overview
  • Analog and digital
    • Tools needed
    • Transistor Review
  • General operation
    • Diode-connected MOSFETs
    • Analog components
    • Power
    • Demodulation
    • Modulation
  • Analog Power
    • Charge pump
    • Double-antenna implementation
    • Startup circuit
    • PTAT for biasing
    • Power regulator design
  • Analog Demodulation
    • AM demodulation (FM0)
    • Clock generation (types)
  • Analog Modulation
    • A transistor
  • Digital components
    • PRNG
    • Decoding data
    • Interrogator “Query” and “RN16” response.

Speaker Biography

Brian P.TutorialWorkshop4_Photo Degnan received degrees in Mechanical and Computer Engineering from the Rose-Hulman Institute of Technology in 2000 and 2003 respectively after a stint studying Computer Science at the Kanazawa Institute of Technology.  He earned his Ph.D in Electrical Engineering from the Georgia Institute of Technology in 2013 with a research focus of subthreshold, temperature robust circuit architectures.  He is a serial entrepreneur who has taken several products from concept to sales, including video encoders and current measurement equipment.

Brian Degnan’s research focus is power-constrained processing and getting the most use out of the electron.  His research interests include subthreshold asynchronous digital and reprogrammable architectures, as well as lightweight encryption implementations for power constrained systems.  He is currently a Postdoc under Dr. Greg Durgin with the propagation group at Georgia Tech.  Brian Degnan’s work on strong encryption for passively-powered RFID and IoT is sponsored Intelligence Community Postdoctoral Research Fellowship Program at the Georgia Institute of Technology, administered by Oak Ridge Institute for Science and Education through an interagency agreement between the U.S. Department of Energy and the Office of the Director of National Intelligence.

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IEEE RFID Mega Challenge

Finalists of the 2017 IEEE RFID Mega Challenge on Smart Cities have been announced
The 2017 challenge will be focused on the use of RFID in a Smart Cities solution. .
The top 4 finalists of the competition are eligible for the Student Travel Grant
DEADLINE: January 31, 2017

Important Dates

  • Paper submissions due:
    January 18, 2017
  • Workshop proposals due:
    January 27, 2017
  • Mega Challenge submissions due:
    January 31, 2017
  • Paper notifications of acceptance:
    February 27, 2017
  • Poster submissions due:
    March 8, 2017
  • Poster notifications of acceptance:
    March 16, 2017
  • Paper publication-ready versions due:
    March 20, 2017
  • Poster publication-ready versions due:
    March 23, 2017
  • Conference:
    May 9-11, 2017 at Phoenix Convention Center in Phoenix, Arizona, USA